As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, lower power consumption and lower costs, challenges from both fabrication and design issues have resulted in the development of three-dimensional designs, such as a fin field effect transistor (Fin FET). In a Fin FET device, it is possible to utilize additional sidewalls and to suppress a short channel effect.
Another candidate is a vertical field effect transistor (VFET) device. While a Fin FET device has a channel extending in a horizontal direction as a fin, in a VFET, a channel extends in a vertical direction (normal direction to a substrate surface). When a VFET is a gate all around (GAA) device, all of the channel layer (surfaces of the channel layer) can be subject to gate control. A GAA device, such as a GAA MOSFET (or MISFET) device, includes a very narrow cylindrical channel body. In particular, a vertical type GAA device (VGAA) having a channel extending in a vertical direction is a promising device for a candidate for low power SRAM applications. In the present disclosure, new layout structures and configurations of an SRAM using a VFET device with a more uniform layout structure are provided.